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[Other resource] ethernet.tar

Description: 以太网10/100M IP核Verilog源码，可综合。-IP Ethernet 10/100 nuclear Verilog source can be integrated.
Platform: | Size: 934772 | Author: 箫勇天 | Hits:

[Other resource] ETHERNET

Description: 具备GMII接口和ARP协议功能的千兆以太网控制器。经过Xilinx SPATAN-III FPGA验证, Verilog描述
Platform: | Size: 69619 | Author: winwalk | Hits:

[TCP/IP stack] 8019网卡芯片中文数据手册

Description:
Platform: | Size: 237568 | Author: 王旺旺 | Hits:

[Mathimatics-Numerical algorithms] macmiim

Description: 一个关于以太网MAC核和介质无关接口的原代码,希望对大家有帮助!-an Ethernet MAC on the nuclear medium and unrelated to the original interface code, we want to help!
Platform: | Size: 61440 | Author: 王平 | Hits:

[VHDL-FPGA-Verilog] ethernet_tri_mode_rtl.tar

Description: verilog实现的异步UART代码，包括发送模块、接收模块，波特率可配置，另附PC机的c代码-Verilog realize asynchronous UART code, including the transmission module, receiver module, the baud rate can be configured, an additional PC-c code
Platform: | Size: 38912 | Author: | Hits:

[VHDL-FPGA-Verilog] DM9000A

Description: Verilog 编写的网卡DM9000A的IP核，altera公司寄的DE2系统中的源程序核-Verilog prepared DM9000A the IP core network card, altera company sent DE2 System source of nuclear
Platform: | Size: 16384 | Author: zhyy | Hits:

[VHDL-FPGA-Verilog] ethernet_tri_mode.tar

Description:
Platform: | Size: 740352 | Author: hrui | Hits:

[VHDL-FPGA-Verilog] Tri-mode_Ethernet_MAC_Specifications

Description: document for mac 10 100 1000 ethernet verilog code.you find code in this site
Platform: | Size: 247808 | Author: amir | Hits:

[VHDL-FPGA-Verilog] 10100MIP

Description: 以太网10100M IP核Verilog源码(可综合)\以太网10-100M IP核Verilog源码，可综合-10100M IP Ethernet core Verilog source code (which can be integrated) \ 10-100M IP Ethernet core Verilog source code can be integrated
Platform: | Size: 740352 | Author: 打狗队 | Hits:

[VHDL-FPGA-Verilog] FPGAcontrolDM9000AuseVerilog

Description: verilog控制以太网发送程序的实现，用于控制以太网发送-verilog control program for sending Ethernet implementation, used to control the Ethernet to send
Platform: | Size: 4096 | Author: 李振华 | Hits:

[Internet-Network] mac_controller

Description: 用verilog编写实现的以太网控制器（MAC）源码，解压后用ISE打开工程即可。-Prepared using verilog implementation Ethernet Controller (MAC) source code, open the project after decompression can be used ISE.
Platform: | Size: 142336 | Author: 陈阳 | Hits:

[VHDL-FPGA-Verilog] ethernet_tri_mode.tar

Description: 基于verilog编写以太网激励程序源代码-Ethernet-based incentive program write verilog source code
Platform: | Size: 686080 | Author: 张鹏 | Hits:

[Program doc] FPGAEthernetVerilog

Description: 使用Verilog语言在FPGA平台上控制Ethernet上数据的发送与接收-FPGA realization using Verilog to control transmitting and receiving data over Ethernet
Platform: | Size: 6144 | Author: 白宇 | Hits:

[Other] FPGA-DM9000A

Description: FPGA控制DM9000A进行以太网数据收发的Verilog实现-FPGA control DM9000A for Verilog realization of Ethernet data sent and received
Platform: | Size: 2658304 | Author: qmy | Hits:

[VHDL-FPGA-Verilog] xge_mac_latest.tar

Description: Ethernet 10GE MAC 以太网10G的MAC Verilog代码实现-Ethernet 10GE MAC
Platform: | Size: 828416 | Author: xiao | Hits:

[VHDL-FPGA-Verilog] ethernet_controller_Verilog

Description: 以太网控制器源码，verilog语言,包含MAC、MII接口-Ethernet controller ,include MAC and MII interfaces ,by verilog
Platform: | Size: 71680 | Author: CL | Hits:

[VHDL-FPGA-Verilog] crc_eth

Description: Verilog code to add a CRC field at the end of an ethernet frame.
Platform: | Size: 2048 | Author: caracol | Hits:

[LabView] verilog-ethernet-master

Description: Verilog TUTORIAL for beginners. We had earlier published a Verilog tutorial that made use of the Xilinx ISE Simulator.
Platform: | Size: 1093632 | Author: kimluan | Hits:

[VHDL-FPGA-Verilog] 以太网控制器Verilog源码(含有MAC,MII接口)

Description: 以太网控制器Verilog源码(含有MAC,MII接口)(Ethernet controller Verilog source code (including MAC, MII interface))
Platform: | Size: 71680 | Author: 天地孤影i | Hits:

[VHDL-FPGA-Verilog] 10GE Ethernet

Description: 10GE Ethernet FPGA VHDL verilog
Platform: | Size: 610226 | Author: 104758548@qq.com | Hits:
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